#ifndef ADC_H
#define ADC_H

void          initADC           ( void );
int           getADC0           ( void );
int           getADC1           ( void );
int adc_get(volatile unsigned long * adxcr, unsigned long ad_cr_sel_val, volatile unsigned long * adxdr_val);
void adc_init(volatile unsigned long * pinsel, volatile unsigned long * adxcr, unsigned long pinsel_pxy_mask, unsigned long pinsel_pxy_fxn, unsigned long pconp_sel, unsigned long ADxCR_mask);

#define BIT27 (1<<27)
#define BIT26 (1<<26)
#define BIT25 (1<<25)
#define BIT24 (1<<24)
#define BIT21 (1<<21)
#define BIT13 (1<<13)
#define BIT12 (1<<12)
#define BIT7  (1<<7)
#define BIT4  (1<<4)
#define BIT2  (1<<2)
#define PINSEL0_P0p13_MASK    (BIT26|BIT27)
#define PINSEL1_P0p22_MASK    (BIT12|BIT13)
#define PINSEL1_P0p22_ADC1p7  (BIT12)
#define PINSEL0_P0p13_ADC1p4  (BIT26|BIT27)
#define PINSEL1_P0p29_MASK    (BIT26|BIT27)
#define PINSEL1_P0p29_ADC0p2  (BIT26)
#define PCONP_ADC1_PWR        (1<<20)
#define PCONP_ADC0_PWR        (1<<12)

#define AD0CR_SEL_AD0p2 BIT2
#define AD1CR_SEL_AD1p7 BIT7
#define AD1CR_SEL_AD1p4 BIT4

#define AD_CR_CLK_DIV_20 ((21-1)<<8)  // 2.29 MHz clock (48 MHz / 21)
#define AD_CR_CLK_DIV_11 ((11-1)<<8)  // 4.36 MHz clock (48 MHz / 11)
#define AD_CR_PDN_ON     BIT21

  #define AD_DR_RESULT_MASK (0x0000ffc0)
  #define AD_DR_RESULTSHIFT (6)
  #define AD_DR_DONE (0x80000000)

  #define AD_CR_SEL0          (0x00000001)
#define AD_CR_SEL1          (0x00000002)
#define AD_CR_SEL2          (0x00000004)
#define AD_CR_SEL3          (0x00000008)
#define AD_CR_SEL4          (0x00000010)
#define AD_CR_SEL5          (0x00000020)
#define AD_CR_SEL6          (0x00000040)
#define AD_CR_SEL7          (0x00000080)
#define AD_CR_SELMASK       (0x000000ff)
#define AD_CR_CLKDIV        (0x0000ff00)
#define AD_CR_CLKDIVMASK    (0x0000ff00)
#define AD_CR_CLKDIVSHIFT   (8)
#define AD_CR_BURST         (0x00010000)
#define AD_CR_CLKS10        (0x00000000)
#define AD_CR_CLKS9         (0x00020000)
#define AD_CR_CLKS8         (0x00040000)
#define AD_CR_CLKS7         (0x00060000)
#define AD_CR_CLKS6         (0x00080000)
#define AD_CR_CLKS5         (0x000a0000)
#define AD_CR_CLKS4         (0x000c0000)
#define AD_CR_CLKS3         (0x000e0000)
#define AD_CR_PDN           (0x00200000)
#define AD_CR_START_NONE    (0x00000000)
#define AD_CR_START_NOW     (0x01000000)
#define AD_CR_START_P016    (0x02000000)
#define AD_CR_START_P022    (0x03000000)
#define AD_CR_START_MAT01   (0x04000000)
#define AD_CR_START_MAT03   (0x05000000)
#define AD_CR_START_MAT10   (0x06000000)
#define AD_CR_START_MAT11   (0x07000000)
#define AD_CR_START_MASK    (0x07000000)
#define AD_CR_EDGE          (0x08000000)
#define AD_CR_MASK          (0x0f2fffff)



#endif